CH9350L USB keyboard/mouse host (chip)
WCH CH9350L in LQFP-48 as lower machine (state 0): a USB keyboard on its host port 1 (DP / DM, to a USB-A socket) is sent on TXD as UART frames (115200 8N1: 57 AB 88 0B 11 MOD 00 K0…K5 CTR CHK), status 57 AB 82 A3 about once a second. 5 V on VIN5 (100 nF), 3.3 µF on VDD33 (internal regulator, TXD / RXD are 3.3 V logic). Built-in clock and reset; SEL, S0/S1 and BAUD pins left open select lower machine, state 0, 115200 Bd. 15 kΩ host pull-downs on DP / DM are on chip.
Key data
- Category
- Interfaces
- Simulation model
- Behavioural mixed-signal model
- Manufacturer part number
- CH9350L
- Reference prefix
- U
- Pins
- 13
- Land pattern
- LQFP-48_7x7mm_P0.5mm
Simulation model
A behavioural model implements the interface of the chip (registers, protocol, timing) at its pins. The pins are connected to the analog circuit like CMOS pins.
- Model
- ch9350l
- Supply pins
- VIN5 / GND
Pins 13
| Pin | Name | Use |
|---|---|---|
| VIN5 | VIN5Supply pin | 5 V input of the internal regulator: 100 nF to GND |
| VDD33 | VDD33Supply pin | 3.3 V regulator output: at least 3.3 µF to GND (tie to VIN5 for a 3.3 V supply) |
| TXD | TXDOutput pin | UART out (3.3 V): key reports to the RX of the microcontroller |
| RXD | RXDInput pin | UART in (3.3 V): commands from the microcontroller |
| SEL | SELInput pin · pulled up on the board | Mode select: leave open (lower machine) |
| RST | RSTInput pin | Reset: leave open or tie to GND for normal operation |
| GND | GNDGround pin | Ground |
| DP | DP (port 1 D+)Passive pin | USB D+ of host port 1: to the USB-A socket |
| DM | DM (port 1 D−)Passive pin | USB D− of host port 1: to the USB-A socket |
| HP | HP (port 2 D+)Passive pin | USB D+ of host port 2 (not simulated) |
| HM | HM (port 2 D−)Passive pin | USB D− of host port 2 (not simulated) |
| LED0 | LED0Output pin | Status output: LED with series resistor |
| TNOW | TNOWOutput pin | Transmit indicator: high while TXD sends (e.g. RS-485 direction) |
PCB
LQFP-48_7x7mm_P0.5mmCH9350L LQFP-48 (pins per WCH data sheet V2.3; S0 / S1 / BAUD0 / BAUD1 / xOSC left open: state 0, 115200 Bd, internal clock)