BringupDocumentation
ENDE
Open the editor
Built-in circuit elementpmos

P-MOSFET

P-channel MOSFET (BSS84) for high-side switches.

Open the editor
Schematic symbol

Key data

Category
Semiconductors
Simulation model
Built-in circuit element
Reference prefix
Q
Pins
3
Land pattern
SOT-23

Simulation model

Level-1 (Shichman-Hodges) MOSFET, body tied to source, constant gate capacitances. The type selects the SPICE model card.

Primitive
M
Model and limitations

Level-1 MOSFET channel model

Included effects

  • Cutoff, linear and saturation regions with channel-length modulation; reverse channel operation.
  • Constant gate-source and gate-drain capacitances when supplied by the model card.

Model limitations

  • No body diode, body effect, avalanche breakdown, subthreshold current or temperature dependence.
  • Gate charge and switching losses are not qualified by fixed capacitances. Device names do not establish manufacturer calibration.

Offline reference checks

  • 24 NMOS/PMOS DC bias points compared with ngspice Level 1.
  • Existing loaded NMOS/PMOS switch reference circuits.

DC comparison uses |VGS| = 0, 1, 1.8, 3.3 V and |VDS| = 0.1, 1, 3.3 V with stated reference parameters. Other conditions need additional validation.

Documented test coverage, not a live test result or manufacturer approval. Simulation results depend on the selected parameters and circuit.

Model cards

PMOS_BSS84 PMOS
VTO-1.6
KP0.15
LAMBDA0.02
CGS2e-11
CGD5e-12

Pins 3

PinNameUse
DDPassive pinDrain: to the load (the load goes to GND)
GGPassive pinGate: low = on; pull-up to the source keeps it off
SSPassive pinSource: to the supply (high-side switch)

Parameters 1

Typemodel
DefaultPMOS_BSS84
PMOS_BSS84

PCB

Verified land patternSOT-23