ESP32-C3 (RISC-V, Firmware)
Runs real firmware (Zephyr zephyr.elf / zephyr.bin for esp32c3_devkitm) on an emulated RV32IMC core at 160 MHz: GPIO matrix, UART0 (TX GPIO21), SYSTIMER, LEDC PWM, I2C0, GP-SPI2 (CPU transfers), SAR ADC one-shot reads (GPIO0–5), interrupt matrix; mask ROM functions emulated. No Wi-Fi/BLE radio.
Key data
- Category
- ICs
- Simulation model
- Microcontroller with real firmware
- Manufacturer part number
- ESP32-C3FH4
- Reference prefix
- U
- Pins
- 18
- Land pattern
- ESP32-C3-WROOM-02
Notes
The firmware runs on an emulated CPU core, instruction by instruction. Peripherals that the model implements (GPIO, timers, UART, SPI, I²C, ADC and others, see the description) act on the pins of the circuit, so the analog parts around the chip see the same voltages and timing as on a real board.
- Right-click the part and choose "Open in code editor" to write and compile its code; "Serial monitor" shows its UART output.
- In the inspector you can load a demo firmware or your own ELF / Intel HEX / BIN file instead.
- GPIO pins are real circuit pins: an LED on an output needs a series resistor, an input needs a defined level (pull-up or pull-down).
- The debugger in the code view stops at breakpoints and shows registers, variables and the call stack.
Simulation model
An emulated CPU core runs the firmware binary instruction by instruction. The GPIO pins are pins of the analog circuit: outputs drive through a driver resistance, inputs read the voltage with thresholds.
- Device
- esp32c3
- CPU core
- RISC-V RV32IMC
- Emulator
- RISC-V emulator
- Firmware
- Zephyr project in the code view, or your own ELF / BIN file
- Flash / RAM for firmware
- 4 MB / 400 KB
- Supply pins
- VDD / GND
- Mapped GPIO pins
- 16
Pins 18
simulatedreal chip onlyPin functions from the emulator and the datasheet.
| Pin | Name | Functions | Use |
|---|---|---|---|
| VDD | 3V3Supply pin | Supply 3.0–3.6 V, at least 500 mA peak for the radio | |
| GND | GNDGround pin | Ground | |
| GPIO0 | GPIO0I/O pin | ADC1_CH0XTAL_32K_PLEDC_PWMI2C0SPI2 | GPIO or analog input (SAR ADC) |
| GPIO1 | GPIO1I/O pin | ADC1_CH1XTAL_32K_NLEDC_PWMI2C0SPI2 | GPIO or analog input (SAR ADC) |
| GPIO2 | GPIO2I/O pin | ADC1_CH2FSPIQLEDC_PWMI2C0SPI2 | Strapping pin: must be high at boot (10 kΩ pull-up) |
| GPIO3 | GPIO3I/O pin | ADC1_CH3LEDC_PWMI2C0SPI2 | GPIO or analog input (SAR ADC) |
| GPIO4 | GPIO4I/O pin | ADC1_CH4MTMSLEDC_PWMI2C0SPI2 | JTAG (MTMS) or analog input; GPIO otherwise |
| GPIO5 | GPIO5I/O pin | ADC2_CH0MTDILEDC_PWMI2C0SPI2 | JTAG (MTDI) or analog input; GPIO otherwise |
| GPIO6 | GPIO6I/O pin | MTCKLEDC_PWMI2C0SPI2 | JTAG (MTCK); GPIO otherwise |
| GPIO7 | GPIO7I/O pin | MTDOLEDC_PWMI2C0SPI2 | JTAG (MTDO); GPIO otherwise |
| GPIO8 | GPIO8I/O pin | LEDC_PWMI2C0SPI2 | Strapping pin: must be high at boot (10 kΩ pull-up); RGB LED on the DevKitM-1 |
| GPIO9 | GPIO9I/O pin | LEDC_PWMI2C0SPI2 | BOOT button: high at reset = run from flash, low = download mode |
| GPIO10 | GPIO10I/O pin | LEDC_PWMI2C0SPI2 | GPIO; I2C0, GP-SPI2 and LEDC PWM can be routed here (GPIO matrix) |
| GPIO18 | GPIO18I/O pin | USB_D-LEDC_PWMI2C0SPI2 | USB D− of the built-in USB serial/JTAG (real chip only) |
| GPIO19 | GPIO19I/O pin | USB_D+LEDC_PWMI2C0SPI2 | USB D+ of the built-in USB serial/JTAG (real chip only) |
| GPIO20 | GPIO20/RXI/O pin | U0RXDLEDC_PWMI2C0SPI2 | UART0 RX: console / flashing |
| GPIO21 | GPIO21/TXI/O pin | U0TXDLEDC_PWMI2C0SPI2 | UART0 TX: console output (Zephyr printk) |
| EN | ENI/O pin | CHIP_EN | Chip enable / reset: 10 kΩ to 3V3 and 1 µF to GND |
Parameters 1
packagePCB
ESP32-C3-WROOM-02| Package | Land pattern | Status | Source |
|---|---|---|---|
| WROOM-02 · ESP32-C3-WROOM-02-N4 | ESP32-C3-WROOM-02 | Verified land pattern | KiCad 10.0.7 library: symbol ESP32-C3-WROOM-02 (pin numbers), footprint RF_Module:ESP32-C3-WROOM-02 (IPC-7351B land pattern); module ESP32-C3-WROOM-02 (4 MB flash, 40 MHz crystal and PCB antenna on the module; Espressif datasheet §3/§7); keep the antenna area free of copper and at the board edge |
| |||
| QFN32 · ESP32-C3FH4 | QFN-32-1EP_5x5mm_P0.5mm_EP3.7x3.7mm | Draft: check before production | KiCad 10.0.7 library: symbol ESP32-C3 (pin numbers), footprint Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.7x3.7mm (IPC-7351B land pattern) |
Needs: bare ESP32-C3 (QFN-32 5×5 mm): needs the Espressif reference circuit (40 MHz crystal on XTAL_P/N, RF matching and antenna on LNA_IN, decoupling of VDD_SPI and the supply). Without your own RF design use the WROOM-02 module. | |||