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Microcontroller with real firmwareESP32-C3FH4esp32c3

ESP32-C3 (RISC-V, Firmware)

Runs real firmware (Zephyr zephyr.elf / zephyr.bin for esp32c3_devkitm) on an emulated RV32IMC core at 160 MHz: GPIO matrix, UART0 (TX GPIO21), SYSTIMER, LEDC PWM, I2C0, GP-SPI2 (CPU transfers), SAR ADC one-shot reads (GPIO0–5), interrupt matrix; mask ROM functions emulated. No Wi-Fi/BLE radio.

3V3GNDGPIO0GPIO1GPIO2GPIO3GPIO4GPIO5GPIO6GPIO7GPIO8GPIO9GPIO10GPIO18GPIO19GPIO20/RXGPIO21/TXENESP32-C3FH4
Schematic symbol

Key data

Category
ICs
Simulation model
Microcontroller with real firmware
Manufacturer part number
ESP32-C3FH4
Reference prefix
U
Pins
18
Land pattern
ESP32-C3-WROOM-02

Notes

The firmware runs on an emulated CPU core, instruction by instruction. Peripherals that the model implements (GPIO, timers, UART, SPI, I²C, ADC and others, see the description) act on the pins of the circuit, so the analog parts around the chip see the same voltages and timing as on a real board.

  • Right-click the part and choose "Open in code editor" to write and compile its code; "Serial monitor" shows its UART output.
  • In the inspector you can load a demo firmware or your own ELF / Intel HEX / BIN file instead.
  • GPIO pins are real circuit pins: an LED on an output needs a series resistor, an input needs a defined level (pull-up or pull-down).
  • The debugger in the code view stops at breakpoints and shows registers, variables and the call stack.

Simulation model

An emulated CPU core runs the firmware binary instruction by instruction. The GPIO pins are pins of the analog circuit: outputs drive through a driver resistance, inputs read the voltage with thresholds.

Device
esp32c3
CPU core
RISC-V RV32IMC
Emulator
RISC-V emulator
Firmware
Zephyr project in the code view, or your own ELF / BIN file
Flash / RAM for firmware
4 MB / 400 KB
Supply pins
VDD / GND
Mapped GPIO pins
16

Pins 18

simulatedreal chip onlyPin functions from the emulator and the datasheet.

PinNameFunctionsUse
VDD3V3Supply pinSupply 3.0–3.6 V, at least 500 mA peak for the radio
GNDGNDGround pinGround
GPIO0GPIO0I/O pinADC1_CH0XTAL_32K_PLEDC_PWMI2C0SPI2GPIO or analog input (SAR ADC)
GPIO1GPIO1I/O pinADC1_CH1XTAL_32K_NLEDC_PWMI2C0SPI2GPIO or analog input (SAR ADC)
GPIO2GPIO2I/O pinADC1_CH2FSPIQLEDC_PWMI2C0SPI2Strapping pin: must be high at boot (10 kΩ pull-up)
GPIO3GPIO3I/O pinADC1_CH3LEDC_PWMI2C0SPI2GPIO or analog input (SAR ADC)
GPIO4GPIO4I/O pinADC1_CH4MTMSLEDC_PWMI2C0SPI2JTAG (MTMS) or analog input; GPIO otherwise
GPIO5GPIO5I/O pinADC2_CH0MTDILEDC_PWMI2C0SPI2JTAG (MTDI) or analog input; GPIO otherwise
GPIO6GPIO6I/O pinMTCKLEDC_PWMI2C0SPI2JTAG (MTCK); GPIO otherwise
GPIO7GPIO7I/O pinMTDOLEDC_PWMI2C0SPI2JTAG (MTDO); GPIO otherwise
GPIO8GPIO8I/O pinLEDC_PWMI2C0SPI2Strapping pin: must be high at boot (10 kΩ pull-up); RGB LED on the DevKitM-1
GPIO9GPIO9I/O pinLEDC_PWMI2C0SPI2BOOT button: high at reset = run from flash, low = download mode
GPIO10GPIO10I/O pinLEDC_PWMI2C0SPI2GPIO; I2C0, GP-SPI2 and LEDC PWM can be routed here (GPIO matrix)
GPIO18GPIO18I/O pinUSB_D-LEDC_PWMI2C0SPI2USB D− of the built-in USB serial/JTAG (real chip only)
GPIO19GPIO19I/O pinUSB_D+LEDC_PWMI2C0SPI2USB D+ of the built-in USB serial/JTAG (real chip only)
GPIO20GPIO20/RXI/O pinU0RXDLEDC_PWMI2C0SPI2UART0 RX: console / flashing
GPIO21GPIO21/TXI/O pinU0TXDLEDC_PWMI2C0SPI2UART0 TX: console output (Zephyr printk)
ENENI/O pinCHIP_ENChip enable / reset: 10 kΩ to 3V3 and 1 µF to GND

Parameters 1

Packagepackage
DefaultWROOM-02
WROOM-02QFN32

PCB

Verified land patternESP32-C3-WROOM-02
PackageLand patternStatusSource
WROOM-02 · ESP32-C3-WROOM-02-N4ESP32-C3-WROOM-02Verified land patternKiCad 10.0.7 library: symbol ESP32-C3-WROOM-02 (pin numbers), footprint RF_Module:ESP32-C3-WROOM-02 (IPC-7351B land pattern); module ESP32-C3-WROOM-02 (4 MB flash, 40 MHz crystal and PCB antenna on the module; Espressif datasheet §3/§7); keep the antenna area free of copper and at the board edge
  • EN EN: 10 kΩ to 3V3 and 1 µF to GND (RC power-on delay, datasheet WROOM-02 §4.2)
  • GPIO9 GPIO9 (BOOT) high at reset: internal pull-up or boot button to GND
  • GPIO8 GPIO8 must be high at boot (strapping pin, 10 kΩ pull-up)
  • GPIO2 GPIO2 must be high at boot (strapping pin, 10 kΩ pull-up)
QFN32 · ESP32-C3FH4QFN-32-1EP_5x5mm_P0.5mm_EP3.7x3.7mmDraft: check before productionKiCad 10.0.7 library: symbol ESP32-C3 (pin numbers), footprint Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.7x3.7mm (IPC-7351B land pattern)

Needs: bare ESP32-C3 (QFN-32 5×5 mm): needs the Espressif reference circuit (40 MHz crystal on XTAL_P/N, RF matching and antenna on LNA_IN, decoupling of VDD_SPI and the supply). Without your own RF design use the WROOM-02 module.